Prof. Dr. Satnam Singh

"Multi-Target Data-Parallel Programming with Accelerator for GPUs, Multicore Processors and FPGAs"

In this presentation, I will introduce and motivate the need for data- parallel descriptions that can be automatically re-targeted to execute on wildly different kinds of hardware including vector instructions on multicore processors, GPUs (graphics cards) and FPGAs (special circuits that can be quickly reconfigured to implement new functionality). Specifically, I shall talk about the Accelerator project at Microsoft which has produced a library of data-parallel operations and memory transformations that aim to be high level enough to permit civilian programmers to express their algorithms in a manner which can be automatically compiled to parallel implementations on GPUs, SSE3 vector instructions on multiple cores and Xilinx FPGA circuits. As the processing capabilities on our desktops, on our devices and in the cloud become more heterogeneous we will increasingly need programming models that allow us to compile to multiple targets from a single description. Although this seems very hard to do in the general case we do believe there is a good chance of solving this problem for a class of data-parallel algorithms.